1. Field of the Invention
The invention relates to an integrated circuit having a hydrogen barrier layer to protect circuit elements containing ferroelectric or high-dielectric constant metal oxide materials, and to a method for fabricating such a circuit.
2. Statement of the Problem
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See Miller, U.S. Pat. No. 5,046,043. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO3 type ferroelectric oxides such as PZT (lead titanate zirconate) and PLZT (lanthanum lead titanate zirconate) have been studied for practical use in integrated circuits. Layered superlattice material oxides have also been studied for use in integrated circuits. See Watanabe, U.S. Pat. No. 5,434,102. Layered superlattice materials exhibit characteristics in ferroelectric memories that are orders of magnitude superior to those of PZT and PLZT compounds. Integrated circuit devices containing ferroelectric elements are currently being manufactured. Nevertheless, the persistent problem of hydrogen degradation during the manufacturing process hinders the economical production in commercial quantities of ferroelectric memories and other IC devices using the layered superlattice material compounds with the desired electronic characteristics.
A typical ferroelectric memory device in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric capacitor typically contains a ferroelectric thin film located between a first, bottom electrode and a second, top electrode, the electrodes typically containing platinum. During manufacture of the circuit, the MOSFET is subjected to conditions causing defects in the silicon substrate. For example, the CMOS/MOSFET manufacturing process usually includes high energy steps, such as ion-mill etching and plasma etching. Defects also arise during heat treatment for crystallization of the ferroelectric thin film at relatively high temperatures, often in the range 500xc2x0-900xc2x0 C. As a result, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET.
To restore the silicon properties of the MOSFET/CMOS, the manufacturing process typically includes a hydrogen annealing step, in which defects such as dangling bonds are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as a forming-gas anneal (xe2x80x9cFGAxe2x80x9d). Conventionally, FGA treatments are conducted underambient conditions in a H2xe2x80x94N2 gas mixture between 350xc2x0 and 550xc2x0 C., typically around 400-450xc2x0 C., for a time period of about 30 minutes. In addition, the integrated-circuit manufacturing process requires other fabrication steps that expose the integrated circuit to hydrogen, often at elevated temperatures, such as hydrogen-rich plasma CVD processes for depositing metals and dielectrics, growth of silicon dioxide from silane or TEOS sources, and etching processes using hydrogen and hydrogen plasma. During processes that involve hydrogen, the hydrogen diffuses principally through the top electrode to the ferroelectric thin film and reduces the oxides contained in the ferroelectric material. The absorbed hydrogen also metallizes the surface of the ferroelectric thin film by reducing metal oxides. As a result of these effects, the electronic properties of the capacitor are degraded. Also, the adhesivity of the ferroelectric thin film to the upper electrode is lowered by the chemical change taking place at the interface. Alternatively, the upper electrode is pushed up by the oxygen gas, water, and other products of the oxidation-reduction reactions taking place. Thus, peeling is likely to take place at the interface between the top electrode and the ferroelectric thin film. In addition, hydrogen also can reach the. lower electrode, leading to internal stresses that cause the capacitor to peel off its substrate. These problems are acute in ferroelectric memories containing layered superlattice material compounds because these oxide compounds are particularly complex and prone to degradation by hydrogen-reduction. After the forming-gas anneal (FGA), the remnant polarization of the ferroelectrics is very low and no longer suitable for storing information. Also, an increase in leakage currents results.
Several methods have been reported in the art to inhibit or reverse hydrogen degradation desired electronic properties in ferroelectric oxide materials. Oxygen-annealing at high temperature (800xc2x0 C.) for about one hour results in virtually complete recovery of the ferroelectric properties degraded by hydrogen treatments. But the high-temperature oxygen-anneal itself might generate defects in silicon crystalline structure, thereby offsetting somewhat the positive effects of any prior forming-gas anneal on the CMOS characteristics. Also, a high-temperature oxygen-anneal may only be conducted prior to aluminum metallization. Furthermore, if hydrogen damage has already caused structural damage, such as peeling of the capacitor layers from underlying and overlying layers, then such damage cannot be reversed by an oxygen-recovery anneal.
To reduce the detrimental effects of hydrogen and protect the metal oxide element, the prior art also teaches the application of hydrogen barrier layers to inhibit the diffusion of hydrogen into the ferroelectric or dielectric metal oxide material. The barrier layer is typically applied over the metal oxide element, but it is also sometimes applied below and to the sides of the element. The utilization of hydrogen barrier layers results in added complexity of the manufacturing process, with a corresponding increase in cost. Extra deposition steps are necessary to form the barrier layers on the integrated circuit substrate. The hydrogen barrier layers also require extra patterning steps. If the material used to form the layer is a poor electrical conductor, then it may be necessary to remove it in still other processing steps to avoid interference with electrical signals. Conversely, if the material is conducting, it may lead to shorting of electrical wiring and circuit paths. Furthermore, some well-known compositions of hydrogen barrier layers do not adhere well to metals commonly used in integrated circuits, such as platinum and aluminum.
Hydrogen degradation is also a problem in complex metal oxides used in nonferroelectric, high-dielectric constant applications in integrated circuits. Hydrogen reactions cause structural damage, as described above for ferroelectric oxides, and cause degradation of dielectric properties. Examples of metal oxides subject to hydrogen degradation include barium strontium titanate (xe2x80x9cBSTxe2x80x9d), barium strontium niobate (xe2x80x9cBSNxe2x80x9d), certain ABO3-type perovskites, and certain layered superlattice materials. Hydrogen barrier layers are, therefore, used also to protect nonferroelectric, high-dielectric constant metal oxides.
Thus, it would be useful to have an integrated circuit having a hydrogen barrier layer and a method for making such a circuit that provide the benefits of a hydrogen barrier layer in protecting ferroelectric and nonferroelectric high-dielectric constant metal oxide materials; in particular, ferroelectric layered superlattice materials from hydrogen degradation, while minimizing the complexity of the integrated circuit and its fabrication method.
3. Solution to the Problem
The invention solves the above problems by providing an integrated circuit having a self-aligning hydrogen barrier layer, and a method for fabricating such an integrated circuit. A hydrogen barrier layer according to the invention protects metal oxide materials by inhibiting the diffusion of hydrogen toward the metal oxides, and thereby preserves the favorable ferroelectric or high-dielectric constant properties of the metal oxide material.
One feature of the invention is formation of an adhesion layer directly over a thin film of metal oxide material. This adhesion layer serves to ensure good adhesion of the hydrogen barrier layer to the underlying circuit layer. This adhesion layer is referred to as the lower, first barrier-adhesion layer. Then a hydrogen barrier layer is formed on the first barrier-adhesion layer, followed by formation of an upper, second barrier-adhesion layer on the hydrogen barrier layer.
The metal oxide material may be ferroelectric material, or it may be nonferroelectric, high-dielectric constant material. The composition of a thin film of ferroelectric material may be selected from a group of suitable ferroelectric oxide materials, including but not limited to: an ABO3-type perovskite, such as a titanate (e.g., BaTiO3, SrTiO3, PbTiO3 (PT), PbZrTiO3 (PZT)), a niobate (e.g., KNbO3), and, preferably, a layered superlattice material. Alternatively, a thin film of nonferroelectric, high-dielectric constant materials may be selected from a group including but not limited to: barium strontium titanate (xe2x80x9cBSTxe2x80x9d), barium strontium niobate (xe2x80x9cBSNxe2x80x9d), certain ABO3-type perovskites, and certain layered superlattice materials.
Preferably, the metal oxide material comprises ferroelectric layered superlattice material. Preferably, the first barrier-adhesion layer comprises titanium, the hydrogen barrier layer comprises titanium nitride, and the upper, second barrier-adhesion layer comprises titanium and titanium oxide.
An object of the invention is formation of a hydrogen barrier layer directly over a memory capacitor containing a thin film of metal oxide material. A memory capacitor is formed by depositing a bottom electrode layer, then forming the thin film of metal oxide material on the bottom electrode, and finally forming a top electrode layer on the metal oxide thin film. Then a lower, first barrier-adhesion layer is formed on the top electrode directly over the thin film of metal oxide material, followed by formation of the hydrogen barrier layer on the first barrier-adhesion layer directly over the thin film of metal oxide material, and finally formation of the upper, second barrier-adhesion layer on the hydrogen barrier layer. Preferably, the memory capacitor is a ferroelectric, nonvolatile memory capacitor. Preferably, the metal oxide material comprises ferroelectric layered superlattice material. Preferably, the capacitor electrodes comprise platinum.
In a preferred method of the invention, the bottom electrode, the metal oxide thin film, the top electrode, the first barrier-adhesion layer, the hydrogen barrier layer, and the second barrier-adhesion layer form a stack of thin film layers that can be patterned using a minimum number of patterning steps to form self-aligning layers in the integrated circuit.
A feature of the invention is that titanium oxide near the top surface of the second barrier-adhesion layer reacts with hydrogen and inhibits the diffusion of hydrogen towards the metal oxide thin film. The amount of titanium oxide in the top half of the second barrier-adhesion layer is between zero and about 50 percent. The titanium oxide is formed by including between zero and about ten volume percent oxygen-gas in the sputter-atmosphere during the sputter-deposition process of the top half of the upper, second barrier-adhesion layer.
Another object of the invention is to remove a portion of the second barrier-adhesion layer to form a wiring groove at the top of the layer in order to increase the overall electrical conductivity through the layer to the circuit layers below.
In preferred embodiments of the invention, the thin film of ferroelectric layered superlattice material contains strontium bismuth tantalum niobate or strontium bismuth tantalate.
The invention provides an integrated circuit device including a thin film of metal oxide material, a first barrier-adhesion layer above and directly over the metal oxide thin film, a hydrogen barrier layer on the first barrier-adhesion layer and directly over the thin film of metal oxide material, and a second barrier-adhesion layer, having a top surface, on the hydrogen barrier layer. Preferably, the metal oxide material comprises ferroelectric layered superlattice material. Preferably, the first and second barrier-adhesion layers comprise titanium. Preferably, the hydrogen barrier layer comprises titanium nitride. Preferably, the thin film of ferroelectric layered superlattice material, the first barrier-adhesion layer, the hydrogen barrier layer, and the second barrier-adhesion layer are self-aligned. Preferably, a portion of the second barrier-adhesion layer at its top surface has been removed to increase electrical conductivity through the layer. Preferably, the ferroelectric layered superlattice material comprises strontium bismuth tantalate or strontium bismuth tantalum niobate.
In a preferred embodiment, the integrated circuit includes a stack capacitor formed on a semiconductor substrate, including a bottom electrode, the thin film of metal oxide material on the bottom electrode, a top electrode on the metal oxide thin film, with the first barrier-adhesion layer on the top electrode. Preferably, the metal oxide thin film, the top electrode, the first barrier-adhesion layer, the hydrogen barrier layer, and the second barrier-adhesion layer are self-aligned.
Numerous other features, objects and advantages of the invention will become apparent from the following description when read in conjunction with the accompanying drawings.